// -*- mode:c++ -*-
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// Date: Dec. 2009
// Authors: Gou pengfei

////////////////////////////////////////////////////////////////////
//
// Bitfield definitions of TRIPS ISA. 
// For more details please refer to TRIPS processor reference 
//

def bitfield OPCODE <31:25>; 		// OP
def bitfield XOPCODE <22:18>; 		// XOP
def bitfield LSID <22:18>;			// LSID for load/store inst.
def bitfield PR  <24:23>;				// Predication bits.
def bitfield EXIT <22:20>;			// EXIT for branch inst.

def bitfield T0 <8:0>;					// ID of consumer 0
def bitfield T1 <17:9>;				// ID of consumer 1
def bitfield IMM <17:9>;				// Instants

def bitfield BRANCH_OFFSET <19:0>;	// Branch target offset of branch inst.
def bitfield CONSTANT <24:9>;			// Constant for const inst.
def bitfield M3TX <22:21>;				// M3TX for move3 inst., providing upper 2 bits of the three move targets 
def bitfield M3T0 <20:14>;				// M3T0 for move3 inst.
def bitfield M3T1 <13:7>;					// M3T1 for move3 inst.
def bitfield M3T2 <6:0>;					// M3T2 for move3 inst.
def bitfield M4TX <23:20>;				// M4TX for move4 inst., providing upper 4 bits of the four move targets
def bitfield M4T0 <19:15>;				// M4T0 for move4 inst.
def bitfield M4T1 <14:10>;				// M4T1 for move4 inst.
def bitfield M4T2 <9:5>;					// M4T2 for move4 inst.
def bitfield M4T3 <4:0>;					// M4T3 for move4 inst.

def bitfield HEAD_NIBBLE<31:28>;  // Nibble bit for header chunk
def bitfield HEAD_BODY<27:0>; // Body bit for header chunk
def bitfield V_R <27>;				// Valid bit for read inst.
def bitfield GR_R <26:22>;				// General register ID for read inst.
def bitfield T0_R <21:14>;					// Consumer 0 for read inst.
def bitfield T1_R <13:6>;					// Consumer 1 for read inst.
def bitfield V_W <5>;					// Valid bit for write inst.
def bitfield GR_W <4:0>;					// General register ID for write inst.

